Which of the following cache levels are implemented on microprocessors?

Which of the following cache levels are implemented on microprocessors?
Each correct answer represents a complete solution. Choose two.

Which of the following cache levels are implemented on microprocessors?
Each correct answer represents a complete solution. Choose two.

A.
Level 0 (L0) cache

B.
Level 1 (L1) cache

C.
Level 5 (L5) cache

D.
Level 2 (L2) cache

Explanation:

The Level 1 (L1) cache is implemented on microprocessors. The L1 cache is a type of memory
implemented inside the microprocessor chip. It is
the fastest memory in the computer. It contains the current working set of data and code. Cache
memory is used to store frequently used
information, so that the processor can access this information without delay.
Level 2 (L2) cache is employed between main memory and L1 cache. The L2 cache contains
additional data and code. In old architecture, L2
cache is mounted on the motherboard, which means that it runs at the motherboard’s speed. In
modern architecture, L2 caches are built
directly into the microprocessor.
Answer options C and A are incorrect. There are no such cache levels as level 0 and level 5.
Reference: Contents: “http://en.wikipedia.org/wiki/CPU_cache”



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