How is the control plane separated from the data plane on branch SRX Series devices?

How is the control plane separated from the data plane on branch SRX Series devices?

How is the control plane separated from the data plane on branch SRX Series devices?

A.
by running separate kernels inside the Junos OS

B.
by dedicating a separate CPU core for the control plane

C.
by using separate CPUs for the control plane and data plane

D.
by offloading control plane traffic to the SPC



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